acastrocab
Members
- Feb 12, 2014
- 185
- 38
this has no sense ...can you use the lollipop and if someone calls you...you can answer it?and he would heard me?
[CM11/12][ROM + KERNEL][Linaro][EXT4][F2FS][UV][Intelliplug][AndMore] Khaon's kitchen 13/01
- Thread starter Khaon
- Start date
it seems, that cm-11-20150105-UNOFFICIAL-aries.zip not compatible with TDB (CWM 6.0.5.1), after full wipe system2 (system, data, cache) this rom not load, only "MI" logo.
new build online that fixes kitkat issues related to the ramdisk and with the cpu hotplugging.
changelog:
changelog:
- AnyKernel2:
- correctly delete all lines from ramdisk related to the execution of mpdecision and thermal and doesn't set ondemand governor
- Kernel:
- intelli_plug updated to 3.9
- switch back to intelli_plug until I fix mako_hotplug
Ok, cm11 only should work on sys 2, I will look at that.
To make sure, did you flash my kernel afterwards(if you wanted to)?
EDIT : just edited the opening thread I wrote in red that sys2 tdb is broken heh
Last edited:
Ok! mako_hotplug fixed, there is two version on the repo one with intelli plug and the other with mako_hotplug.
For the next release, both will be integrated.
For the next release, both will be integrated.
I made coexist mako_hotplug and intelli_plug together, their sysfs entries are located respectivly at
Code:
/sys/devices/virtual/misc/mako_hotplug_control
/sys/module/intelli_plug/parametersI have just uploaded a new build of my kernel.
I have increased L2 cache clocks speed. It should be more smooth, tell me if you notice any improvement.
I have increased L2 cache clocks speed. It should be more smooth, tell me if you notice any improvement.
After answering the call you have to mute and "unmute" the mic using the mic icon on the screen. And after that -people say - mic is working.
acastrocab
Members
- Feb 12, 2014
- 185
- 38
In order to be the most stable I choose to compile the while build with default settings. If this happens it cm fault ahzhha
Khaon's KK kernel 08-01-2015 fully working with omni rom on system1 (first) and TDB enabled, CWM 6.0.5.1. I don't have any FC or reboots for all days after i install it. I'm not use undervolting yet. I'm trying flash khaon's cm-11-20150105 on system1 after full wipe (data, system, cache) but it not loading (only bootlogo of CM-11). may be it's not compatible with TDB.
I think it is time to switch to TWRP without TDB.
I think it is time to switch to TWRP without TDB.
rober7
Members
- Nov 27, 2014
- 55
- 28
Hello little update to the kernel:
I have decreased new introduced L2 cache speed however they are still higher than they used to be. I have increased slightly the voltage of the L2 cache itself to prevent users having to apply a significative increase if the core voltage. You should need something like +12.5/+25 on 1.134GHz + freq steps and this build should be stabler than the previous one.
- apq8064:final voltage for new L2 cache speed frequencies
- merged with google's androidd 3.4 branch: squashed the following commits:
- Merge remote-tracking branch 'common/android-3.4' into lollipop
- ARM: pull in <asm/simd.h> from asm-generic
- ARM: be strict about FP exceptions in kernel mode
- ARM: move VFP init to an earlier boot stage
- *****: create generic version of ablk_helper
- ARM: add support for kernel mode NEON
- *****: sha - Handle unaligned input data in generic sha256 and sha512.
- *****: sha512_generic - set cra_driver_name
- *****: sha512 - Expose generic sha512 routine to be callable from other modules
- *****: create generic version of ablk_helper
- defconfig updated:enabled arm *****
- KEYS: Provide signature verification with an asymmetric key
- KEYS: Asymmetric public-key algorithm ***** key subtype
- KEYS: Implement asymmetric key type
- *****: add crypto_[un]register_shashes for [un]registering multiple shash entries at once
- ARM: 8120/1: *****: sha512: add ARM NEON implementation
- ARM: 8119/1: *****: sha1: add ARM NEON implementation
- ARM: 8118/1: *****: sha1/make use of common SHA-1 structures
- *****: arm-aes - fix encryption of unaligned data
- *****: Fix more AES build errors
- ARM: add .gitignore entry for aesbs-core.S
- ARM: add support for bit sliced AES using NEON instructions
- ARM: move AES typedefs and function prototypes to separate header
- ARM: 7837/3: fix Thumb-2 bug in AES assembler code
- ARM: 7723/1: *****: sha1-armv4-large.S: fix SP handling
- ARM: 7626/1: arm/*****: Make asm SHA-1 and AES code Thumb-2 compatible
- arm/*****: Add optimized AES and SHA1 routines
- sync with f2fs upstream branch
- squashed few commits from CAF:
- mm: vmscan: lock page on swap error in pageout
- Staging: android: binder: More offset validation
- Input: Send events one packet at a time
- binder: NULL pointer reference
- staging: binder: add vm_fault handler
- staging: binder: Change binder mutex to rtmutex.
I have decreased new introduced L2 cache speed however they are still higher than they used to be. I have increased slightly the voltage of the L2 cache itself to prevent users having to apply a significative increase if the core voltage. You should need something like +12.5/+25 on 1.134GHz + freq steps and this build should be stabler than the previous one.
Sadly I don't, I haven't much looked into cm12 for this smartphone.I used a lot of my mic but not for voice calls 
/D. I mean barely use the mic for voice calls.
/D. I mean barely use the mic for voice calls.
rober7
Members
- Nov 27, 2014
- 55
- 28
I flashed your cm12 for a day and worked perfectly (except mic), it would be nice to resolve the mic problem until the official version roll out.Sadly I don't, I haven't much looked into cm12 for this smartphone.I used a lot of my mic but not for voice calls
[quote="Khaon, post: 236839, member: 100536"
I have decreased new introduced L2 cache speed however they are still higher than they used to be. I have increased slightly the voltage of the L2 cache itself to prevent users having to apply a significative increase if the core voltage. You should need something like +12.5/+25 on 1.134GHz + freq steps and this build should be stabler than the previous one.[/quote]
I'm newbie on it, does it mean the battery's drain will get more quickly?
I have decreased new introduced L2 cache speed however they are still higher than they used to be. I have increased slightly the voltage of the L2 cache itself to prevent users having to apply a significative increase if the core voltage. You should need something like +12.5/+25 on 1.134GHz + freq steps and this build should be stabler than the previous one.[/quote]
I'm newbie on it, does it mean the battery's drain will get more quickly?
